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LS1020 series（Lite-BMC Chip）

The LS1020 is a Lite-Baseboard Management Controller (Lite-BMC) chip, a 32-bit RISC-V E906 dual-core CPU with operating up to 600MHz frequency. It adopts a DDR-less design that eliminates the need for external DDR and independent Flash.Equipped with a rich set of system peripheral interfaces, the chip supports Gigabit Ethernet, eMMC, and high-speed USB 2.0. It also integrates industrial-grade secure encryption functions. These features make the LS1020 suitable for a wide range of applications such as servers, data centers, base station BBUs, DPUs, GPUs, and other related devices.

General Characteristic

Hardware Feature

  • 32-bit Dual-core RISC-V
  • Maximum 1280KB SRAM
  • 256M-Bits Serial Flash
  • 64M-Bits PSRAM
  • 14-ch I3C / 16-ch I2C
  • Support 26-ch ADC
  • Multiple hardware encryption modules
  • Support GMAC, eMMC, and USB 2.0

Proprietary SDKs

  • Proprietary SDKs framework
  • Support Zephyr/Linux-RV
  • Extensive application examples
  • Supports dynamic power scheduling
  • Compatible with OpenBMC (w/o KVM）

Development Tools

  • Comprehensive Dev Kits
  • Comprehensive TechDoc
  • Mature upper computer debug
  • Shortens the Hardware Debugging Cycle

Independent R&D

  • RISC-V Architecture
  • National Cryptographic Compliance
  • Independent R&D of core IP
  • Proprietary BMC SDKs
  • Core patents for BMC

Chip Block Diagra

Key Features

RISC-V Embedded Processor

  • 32-bit Dual-core RISC-V CPU
  • 600MHz maximum frequency
  • I-Cache：4KB
  • D-Cache：4KB
  • Support FPU and DSP
  • Serial wire debug interface
  • AHB Bus Interface
  • 2-wire cJTAG debug interface

System Host Interface

  • Enhanced Serial Peripheral Interface (eSPI)
    • Support eSPI 20MHz to 66MHz
    • Peripheral channel
    • Virtual Wire channel
    • OOB message channel
    • Flash Access channel
  • Low Pin Count Interface (LPC)
    • 33MHz maximum frequency
    • Support Slave Mode
      (BMC/BIOS boot)
    • Support SERIRQ
    • Support port 80H/81H：
      • Interrupt Function
      • 256bytes FIFO
      • 64MB DMA
  • Support 2-ch Virtual UART (SOL)
  • Support multiple sets of KCS/BT
    （IPMI 2.0 Complaint）

Memorise

  • Maximum1280KB SRAM
  • 256M-Bits Flash
  • 64M-Bits PSRAM
  • 128-Bytes Battery SRAM
  • 4KB OTP

Security Features

  • Hardware Secure Boot
    • Digital Signature Verification：ECDSz
      （ECC-P256、ECC-P384、SM2/SM3）
    • Firmware Encryption：
      AES-128/256、SM4
  • Encryption Algorithms
    • SM2
    • SHA256/512/SM3
    • RSA1024-4096
    • AES/DES/SM4
    • CRC
    • TRNG

Peripheral Features

  • Up to 234 GPIOs
  • 26-ch ADC
  • SPI
    • QSPI × 1
    • SPI × 4
  • I2C（SMBus）× 16
  • I3C × 14
  • UART × 12
  • USB1.1 Full speed/USB2.0 High speed
  • 2路GMAC × 2
  • 2路SGPIO（Master/Monitor）× 2
  • JTAG Master × 3
  • Fan PWM × 16
  • Fan TACH × 16
  • 1-ch eMMC（2-ch SD）
  • Support FD-CAN、LTPI、PECI、Mailbox

Timers

  • 16-Bits advanced control timer ×2
  • 64-Bits System Timers ×2
  • 32-Bits general purpose timer ×2
  • 16-Bits general purpose timer ×2
  • 16-Bits basic timer ×2
  • Watchdog Timers ×5

Super I/O

  • Full-featured 16550-compatible UARTs ×4
  • Support port 80H/81H：
    • Interrupt Function
    • 256bytes FIFO
    • 64MB DMA
  • Support Mailbox
  • Support ACPI/PM
    • ACPI Complaint
    • SMI/SCI/SerIRQ
    • S3# and S5#
    • Wake-up
    • PnP Reg Set
    • Power Supply Control
    • Power Button Control
    • GPIO Support

封装

  • TFBGA -400（17×17mm）
  • RoHS Compliant Design
  • α Particle：ULA ≤0.002 ph/cm²

选型表

Part ID Host IF SRAM(KB) Flash(KB) GPIO PECI/SB-TSI KBC PS2 TACH PWM USB UART SPI I²C ADCs DACs Temp Package